Generally, an architecture called NUMA (Non-Uniform Memory Access) is frequently adopted in a large scale multi-processor system consisting of a great number of CPUs, memories and I/Os (inputting/outputting sections). This NUMA architecture is characterized in that the respective latencies of the memories are not uniform, or in other words, a “near memory” and a “remote memory” exist. Here, the latency corresponds to response time from a memory when a CPU or the like accesses the memory, and it can be defined that a memory having a small latency is a “near memory” and a memory having a large latency is a “far memory”.
Further, a large scale multi-processor system includes a great number of CPUs, memories and I/Os as resources as described above. In such a large scale multi-processor system, a partitioning technique is used wherein a great number of resources are divided (grouped) into a plurality of partitions and an independent OS (Operating System) operates in each of the partitions.
For example, Patent Documents 1 and 2 listed below each disclose a logical partition (soft partition) technique. In the logical partition techniques, a plurality of OSs are started up for respective logical partitions on a host OS (controlling host). A logical processor or the like is allocated to each logical partition, and the host OS associates the logical processor with a physical processor and causes the OSs to execute processing of the respective logical partitions. While the logical partition technique uses a virtual partition, the present invention is based on a hard partition technique wherein resources are divided and used, that is, a technique wherein a physically different resource is used for each partition.    Patent Document 1: Japanese Patent Laid-Open No. 2006-127462    Patent Document 2: Japanese Patent Laid-Open No. 2007-193776